Computing memory systems are generally composed of one or more dynamic random access memory (DRAM) integrated circuits, referred to herein as DRAM devices, which are connected to one or more processors. Multiple DRAM devices may be arranged on a memory module, such as a dual in-line memory module (DIMM). A DIMM includes a series of DRAM devices mounted on a printed circuit board (PCB) and are typically designed for use in personal computers, workstations, servers, or the like. There are different types of memory modules, including a load-reduced DIMM (LRDIMM) for Double Data Rate Type three (DDR3), which have been used for large-capacity servers and high-performance computing platforms. Memory capacity may be limited by the loading of the data query (DQ) bus and the request query (RQ) bus associated with the user of many DRAM devices and DIMMs. LRDIMMs may increase memory capacity by using a memory buffer (also referred to as a register). Registered memory modules have a register between the DRAM devices and the system's memory controller. For example, a fully buffered DIMM architecture introduces an advanced memory buffer (AMB) between the memory controller and the DRAMS devices on the DIMM. The memory controller communicates with the AMB as if the AMB were a memory device, and the AMB communicates with the DRAM devices as if the AMB were a memory controller. The AMB can buffer data, command and address signals. With this architecture, the memory controller does not write to the DRAM devices, rather the AMB writes to the DRAM devices. This architecture introduces latency to the memory request and increases power consumption for the AMB.